是否有现货：	是	认证：	CCC
封装：	WQFP	功能结构：	数/模混合集成电路
制作工艺：	半导体集成电路	导电类型：	双极型
外形：	扁平型	集成度高低：	大规模集成电路
应用领域：	标准通用	型号：	DS90UR916Q
规格：	1234	商标：	TI
包装：	盘装	PCLK时钟频率：	65MHz
LVCMOS兼容的I / O接口：	1.8V/3.3V	电源电压（VDDN）：	1.8V
电源噪声：	50mVP-P	工作温度范围：	−40 ~+105 °C

DS90UR916Q5-65MHz24-bitColorFPD-LinkIIDeserializerwithImageEnhancementFEATURES？5–65MHzPCLKsupport(140Mbps–1.82Gbps)？RGB888+VS,HS,DESupport？ImageEnhancement-WhiteBalanceLUTsandAdaptiveHi-FRCDitheringThehighspeedserialbusschemeofFPD-LinkII？ACCoupledSTPInterconnectCableupto10Meters？@SpeedLinkBISTModeandReportingPin？I2CCompatibleSerialControlBus？PowerDownModeMinimizesPowerDissipation？1.8Vor3.3VCompatibleLVCMOSI/OInterface？AutomotiveGradeProduct:AEC-Q100Grade2Qualified？>8kVHBMandISO10605ESDRating？FASTRandomDdataLock;NoReferenceClockRequired？AdjustableInputReceiverEqualization？LOCK(RealTimeLinkStatus)ReportingPin？EMIMinimizationonOutputParallelBus(SSCG)？OutputSlewControl(OS)？BackwardCompatibleModeforOperationwithOlderGenerationDevicesAPPLICATIONS联系人：李**联系QQ：？AutomotiveDisplayforNavigation？AutomotiveDisplayforEntertainmentDESCRIPTION联系人：李**联系QQ：TheDS90UR916QFPD-LinkIIdeserializeroperateswiththeDS90UR905QFPD-LinkIIserializertodeliver24-bitdigitalvideodatadifferentialpair.TheDS90UR916QprovidesfeaturesoverasingledesignedtoenhanceimagequalityatthedisplayThehighspeedserialbusschemeofFPD-LinkIIgreatlyeasessystemdesignbyeliminatingskewproblemsbetweenclockanddata,reducesthenumberofconnectorpins,reducestheinterconnectsize,weight,andcost,andoveralleasesPCBlayout.Inaddition,internalDCbalanceddecodingisusedtosupportAC-coupledinterconnects.TheDS90UR916QDes(deserializer)recoversthedata(RGB)andcontrolsignalsandextractstheclockfromtheserialstream.TheDeslockstotheincomingserialdatastreamwithouttheuseofatrainingsequenceorspecialSYNCpatterns,anddoesnotrequireareferenceclock.Alinkstatus(LOCK)outputsignalisprovided.TheDS90UR916Qisideallysuitedfor24-bitcolorapplications.WhitebalancelookuptablesandadaptiveHi-FRCditheringprovideacost-effectivemeanstoenhancedisplayimagetheuserqualitySerialtransmissionisoptimizedwithuserselectablereceiverequalization.EMIisminimizedbytheuseoflowvoltageandtheDesmaybeconfiguredtogenerateSpreaddifferentialsignaling,output