“销售inap375\inap395\inap590”参数说明
| 是否有现货： |
是 |
认证： |
CCC |
| 封装： |
QFP/PFP |
功能结构： |
数/模混合集成电路 |
| 制作工艺： |
半导体集成电路 |
导电类型： |
双极型 |
| 外形： |
扁平型 |
集成度高低： |
大规模集成电路 |
| 应用领域： |
专用 |
型号： |
inap395 |
| 规格： |
1234 |
商标： |
INOVA |
| 包装： |
卷带/盘装 |
Check： |
0x4FD94EA8 |
| Init： |
0xFFFFFFFF |
Xor out： |
0x00000000 |
| 管脚： |
100 |
Width： |
32 |
| Representation： |
0x120044009 (0x90022004) |
Reflection in： |
no |
| Polynomial： |
x32 + x29 + x18 + x14 + x3 + 1 (32 29 18 14 3 0) |
“销售inap375\inap395\inap590”详细介绍
The INAP395R offers several data integrity features at the video interface as well as the video transmission in?
video mode and bulk data mode. These features monitor the video path for bit errors. The hardware video interface of the INAP375T is able to detect if the sender is “alive” by checking the video timing for continuity or?
by detecting signal transitions (see [2]). This check is supported by continuous frame IDs added as a status bit?
in the blanking of each frame. In addition, the APIX2 transmitter can be configured to calculate a CRC32 checksum for each line, also transmitted in the horizontal blanking to avoid transmission overhead.
The CRC32 checksum as well as the transition status information are embedded into the horizontal blanking?
of the video transmission. The INAP395R re-calculates and verifies the checksum and provides the CRC32,?
the frame id (from INAP375T), the result of the CRC check and several other status information at the pixel?
interface in the blanking period. The checksum is calculated over 8 bits of the data interface, defined by register?
px_ch0_di_crc_mask/px_ch1_di_crc_mask. In addition, the INAP395R supports the generation of different test?
patterns to allow the physical check of the interface after each line. Figure 8-1 shows how information is integrated into the blanking and which bits are added by the receiver to indicate the status of the CRC check. For?
transmissions in video mode, bits 1 and 0 are “reserved”.
The CRC32 is defined as shown in Table 8-1. The checksum is verified by the INAP395R and also provided at?
the interface as shown in Figure 8-1. In case of CRC errors, the INAP395R indicates the error in the horizontal?
blanking (horizontal blanking +3, bit 10) and is also available as status register
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?In addition to the indication of lines with CRC errors, the following registers allow configuration of a threshold?
of erroneous lines per frame. Upon detection of an incorrect line CRC, the INAP395R increases an internal?
counter, which is reset on start of a new frame. In case the counter es the configured threshold, the device?
triggers the status flags st_px_ch0_lines_per_frame_mismatch, st_px_ch1_lines_per_frame_mismatch and?
indicates the error at the pixel interface (see Section 8.0)
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